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USB1T11A Universal Serial Bus Transceiver
November 1999 Revised December 1999
USB1T11A Universal Serial Bus Transceiver
General Description
The USB1T11A is a one chip generic USB transceiver. It is designed to allow 5.0V or 3.3V programmable and standard logic to interface with the physical layer of the Universal Serial Bus. It is capable of transmitting and receiving serial data at both full speed (12Mbit/s) and low speed (1.5Mbit/s) data rates. The input and output signals of the USB1T11A conform with the "Serial Interface Engine". Implementation of the Serial Interface Engine along with the USB1T11A allows the designer to make USB compatible devices with off-theshelf logic and easily modify and update the application.
Features
s Complies with Universal Serial Bus specification 1.1 s Utilizes digital inputs and outputs to transmit and receive USB cable data s Supports 12Mbit/s "Full Speed" and 1.5Mbit/s "Low Speed" serial data transmission s Compatible with the VHDL "Serial Interface Engine" from USB Implementers' Forum s Supports single-ended data interface s Single 3.3V supply s ESD Performance : Human Body Model > 4000 V
Ordering Code:
Order Number USB1T11AM USB1T11AMTC Package Number M14A MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Connection Diagram
Logic Diagram
(c) 1999 Fairchild Semiconductor Corporation
DS500234
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USB1T11A
Pin Descriptions
Pin Name RCV OE# MODE I/O O I I Description Receive data. CMOS level output for USB differential input Output Enable. Active LOW, enables the transceiver to transmit data on the bus. When not active the transceiver is in receive mode. Mode. When left unconnected, a weak pull-up transistor pulls it to VCC and in this GND, the VMO/FSEO pin takes the function of FSEO (Force SEO). Inputs to differential driver. (Outputs from SIE). MODE 0 VPO 0 0 VPO, VMO/FSEO I 1 1 1 0 0 1 1 VMO/FSEO 0 1 0 1 0 1 0 1 RESULT Logic "0" SE0# Logic "1" SEO# SE0# Logic "0" Logic "1" Illegal code
Gated version of D- and D+. Outputs are logic "0" and logic "1". Used to detect single ended zero (SE0#), error conditions, and interconnect speed. (Input to SIE). VP VP, VM O 0 0 1 1 D+, D- SUSPND SPEED VCC GND AI/O I I VM 0 1 0 1 RESULT SE0# Low Speed Full Speed Error
Data+, Data-. Differential data bus conforming to the Universal Serial Bus standard. Suspend. Enables a low power state while the USB bus is inactive. While the suspend pin is active it will drive the RCV pin to a logic "0" state. Both D+ and D- are 3-STATE. Edge rate control. Logic "1" operates at edge rates for "full speed". Logic "0" operates edge rates for "low speed". 3.0V to 3.6V power supply Ground reference
Functional Truth Table
Input Mode 0 0 0 0 1 1 1 1 X X
X = Don't Care Z = 3-STATE U = Undefined State
I/O OE 0 0 0 0 0 0 0 0 1 1 SUSPND 0 0 0 0 0 0 0 0 0 1 D+ 0 0 1 0 0 0 1 1 Z Z D- 1 0 0 0 0 1 0 1 Z Z RCV 0 U 1 U U 0 1 U U U
Outputs VP 0 0 1 0 0 0 1 U U U VM 1 0 0 0 0 1 0 U U U Result Logic 0 SEO# Logic 1 SEO# SEO# Logic 0 Logic 1 Illegal Code D+/D- Hi-Z D+/D- Hi-Z
VPO 0 0 1 1 0 0 1 1 X X
VMO/FSEO 0 1 0 1 0 1 0 1 X X
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USB1T11A
Absolute Maximum Ratings(Note 1)
DC Supply Voltage (VCC) DC Input Diode Current (IIK) VI < 0 Input Voltage (VI) (Note 2) Input Voltage (VI/O) Output Diode Current (IOK) VO > VCC or VO < 0 Output Voltage (VO) (Note 2) Output Source or Sink Current (IO) VP.VM, RCV pins VO = 0 to VCC Output Source or Sink Current (IO) D+/D- pins VO = 0 to VCC VCC or GND Current (ICC , IGND) Storage Temperature (TSTO) 50 mA 100 mA -60C to + 150C 15 mA -0.5V to VCC + 0.5V 50 mA -0.5V to +5.5V -0.5V to VCC + 0.5V -50 mA -0.5V to +7.0V
Recommended Operating Conditions
Supply Voltage VCC Input Voltage (VI) Input Range for AI/O (VAI/O) Output Voltage (VO) Operating Ambient Temperature in free air (Tamb) -40C to +85C 3.0V to 3.6V 0V to 5.5V 0V to VCC 0V to VCC
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristic tables are not guaranteed at the absolute maximum rating. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: The input and output voltage ratings may be exceeded if the input and output clamp current ratings are observed.
DC Electrical Characteristics (Digital Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 3.0V to 3.6V Limits Symbol Parameter INPUT LEVELS: VIL VIH VOL VOH LOW Level Input Voltage HIGH Level Input Voltage OUTPUT LEVELS: LOW Level Output Voltage HIGH Level Output Voltage LEAKAGE CURRENT: IL ICCFS ICCLS ICCQ ICCS Input Leakage Current Supply Current (Full Speed) Supply Current (Low Speed) Quiescent Current Supply Current in Suspend VCC = 3.0 to 3.6 VCC = 3.0 to 3.6 VCC = 3.0 to 3.6 VCC = 3.0 to 3.6 VIN = VCC or GND VCC = 3.0 to 3.6; Mode = VCC 5 5 5 5 10 A mA mA mA A IOL = 4 mA IOL = 20 A IOH = 4 mA IOH = 20 A 2.4 VCC - 0.1 0.4 0.1 V V 2.0 0.8 V V Test Conditions Temp = -40C to +85C Min Typ Max Unit
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USB1T11A
DC Electrical Characteristics
Symbol Parameter INPUT LEVELS: VDI VCM VSE VOL VOH VCR IOZ CIN(Note 4) Differential Input Sensitivity Differential Common Mode Range Single Ended Receiver Threshold OUTPUT LEVELS: Static Output LOW Voltage Static Output HIGH Voltage Differential Crossover LEAKAGE CURRENT:
(D+/D- Pins)
Limits Test Conditions Temp = -40C to +85C Min Typ Max V 2.5 2.0 0.3 2.8 1.3 3.6 2.0 5 10 10 V V V V V A pF % % Units
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 3.0V to 3.6V
|(D+) - (D-)| Includes VDI Range
0.2 0.8 0.8
RL of 1.5 k to 3.6V RL of 15 k to GND
High Z State Data Line Leakage Current 0V < VIN < 3.3V CAPACITANCE: Transceiver Capacitance Capacitance Match OUTPUT RESISTANCE: Pin to GND
ZDRV (Note 3) Driver Output Resistance Resistance Match
Steady State Drive
4
20 10
Note 3: Excludes external resistor. In order to comply with USB Specification 1.1, external series resistors of 24 1% each on D+ and D- are recommended. This specification is guaranteed by design and statistical process distribution. Note 4: This specification is guaranteed by design and statistical process distribution.
AC Electrical Characteristics (D+/D- Pins, Full Speed)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 3.0V to 3.6V CL = 50 pF; RL = 1.5 k on D+ to VCC Limits Symbol Parameter DRIVER CHARACTERISTICS: 10% and 90% tR tF tRFM VCRS tPLH tPLH tPHZ tPLZ tPZH tPZL tPLH tPHL tPLH tPHL Rise Time Fall Time Rise/Fall Time Matching Output Signal Crossover Voltage DRIVER TIMINGS: Driver Propagation Delay (VPO, VMO/FSEO to D+/D-) Driver Disable Delay (OE# to D+/D-) Driver Enable Delay (OE# to D+/D-) RECEIVER TIMINGS: Receiver Propagation Delay (D+, D- to RCV) Single-ended Receiver Delay (D+, D- to VP, VM) Figure 3 Figure 3 Figure 3 Figure 3 16 19 8 8 ns ns ns ns Figure 2 Figure 2 Figure 4 Figure 4 Figure 4 Figure 4 18 18 13 13 17 17 ns ns ns ns ns ns Figure 1 Figure 1 (tr/tf) 4 4 90 1.3 20 20 110 2.0 % V ns Test Condition Temp = -40C to +85C Min Typ Max Units
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USB1T11A
AC Electrical Characteristics (D+/D- Pins, Low Speed)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 3.0V to 3.6V CL = 200 to 600 pF; RL = 1.5k on D- to VCC Limits Symbol Parameter DRIVER CHARACTERISTICS: 10% and 90% tLR tLF tRFM VCRS tPLH tPHL tPHZ tPLZ tPZH tPZL tPLH tPHL tPLH tPHL Rise Time Fall Time Rise/Fall Time Matching Output Signal Crossover Voltage DRIVER TIMINGS: Driver Propagation Delay (VPO, VMO/FSEO to D+/D-) Driver Disable Delay (OE# to D+/D-) Driver Enable Delay (OE# to D+/D-) RECEIVER TIMINGS: Receiver Propagation Delay (D+, D- to RCV) Single-ended Receiver Delay (D+, D- to VP, VM) Figure 3 Figure 3 Figure 3 Figure 3 18 18 28 28 ns ns ns ns Figure 2 Figure 2 Figure 4 Figure 4 Figure 4 Figure 4 300 300 13 13 205 205 ns ns ns ns ns ns Figure 1 Figure 1 (tr/tf) 75 75 80 1.3 300 300 120 2.0 % V ns Test Conditions Min Tamb = -40C to +85C Typ Max Unit
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USB1T11A
AC Waveforms
VOL and VOH are the typical output voltage drops that occur with the output load. (VCC never goes below 3.0V)
FIGURE 1. Rise and Fall Times FIGURE 2. VPI, VMO/FSEO to D+/D-
FIGURE 3. D+/D- to RCV, VP/VM
FIGURE 4. OE# to D+/D-
Test Circuits and Waveforms
Load for VM/VP and RCV Load for Enable and Disable Times
Note: V = 0 for tPZH, tPHZ V = VCC for tPZL, tPLZ
Load for D+/D-
Test
CL = 50 pF, Full Speed CL = 50 pFm Low Speed (Min Timing) CL = 350 pF, Low Speed (Max Timing) 1.5 k on D- (Low Speed) or D+ (Full Speed) only
S1 Close Open Open Close
D-/LS D+/LS D-/FS D+/FS
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USB1T11A
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A
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USB1T11A Universal Serial Bus Transceiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 8 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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